This invention is related to electronic television tuning systems which vary tuning frequency by a change in voltage applied to a varactor diode tuning device. More particularly, this invention is concerned with apparatus for minimizing the number of interconnections between the integrated circuit chips comprising such a system.
Electronically tuned television receivers can be conveniently classified according to the type of viewer operated channel number input apparatus (hereinafter referred to as channel selection means) employed. Typically, such apparatus are of two general types; the first type comprising a ten digit keyboard whose keys are individually accessable by the viewer for selecting a desired channel number and the second type comprising a sequential control system. In the sequential control system an up/down chnnel selector or the like is operated for sequencing through a predetermined channel program sequence until the desired channel is reached. Frequently, both types of channel selection apparatus are provided as part of the television receiver allowing the viewer to either directly access a television channel through the keyboard or to identify the channel by means of the sequential control system. In any case, the channel number selection means includes appropriate circuitry for generating encoded channel number information enabling tuning by the remainder of the tuner to the corresponding television channel. For purposes of convenience, the latter portion of the tuner, i.e. the portion responsive to the channel selection means, will hereinafter be referred to as the channel computer. It will thus be appreciated that the channel computer operates upon the input channel number information supplied from the channel selection means to tune the system, by applying appropriate voltages to a varactor diode tuning device, to a selected television channel.
U.S. Pat. Nos. 4,002,985 to Merrell and 4,023,107 to Tanaka, both assigned to the assignee of the present invention, disclose electronic tuning systems having a channel computer controlled by a sequential control type channel selection means. Apparatus comprising circuitry enabling the alternative use of keyboard and sequential control type channel selection means for controlling a channel computer is shown in U.S. Pat. No. 3,961,266 to Tanaka also assigned to the assignee of the present invention. Further details of the tuning system shown in the latter mentioned Tanaka patent are disclosed in U.S. Pat. Nos. 3,946,319 to Ma et al and 3,956,702 to Tanaka.
Common to the foregoing tuning systems is a physical separation of function wherein the circuitry corresponding to the channel selection means, regardless of which generic type or both, and the circuitry corresponding to the channel computer are fabricated on individual integrated circuit chips. In addition, means for displaying the units and tens digits of a selected channel number is also provided as a physically separate unit. Communication between the channel selection and channel computer chips is affected by interface circuitry normally comprising a plurality of data lines connected between suitably located pins on the two chips. Thus, for example, a channel number generated by the channel selection chip in response to a viewer action may be transmitted in multiplexed format to the channel computer chip as BCD channel number information. The data lines carrying the channel number information may also be coupled to the display apparatus for providing a visual indication of the selected channel number.
While other necessary data may be transmitted between the chips in a similar manner, primarily for economy purposes, it is desirable to minimize the number of interfacing lines, and thereby the number of required chip pin-pairs, without sacrificing operational capabilities. In fact, it is frequently more desirable, from a cost perspective, to add a relatively significant amount of circuitry to one or both of the chips than to accomplish the same result through the expedient of providing an interface line interconnecting a pair of pins on the two chips. Although conceptually the elimination of interface lines is therefore a highly worthy design criterion, as a practical matter, its implementation is normally quite difficult to realize.
For example, it is often required that a particular signal be developed in the channel computer chip whenever the channel selection chip is characterized by some particular state. Thus, when only the tens digits of a selected channel number has been entered by means of a keyboard type channel selection means it would be advantageous to develope a signal in the channel computer chip for enabling circuitry for blanking the raster of the viewing screen until a units digits has also been entered. While such can be accomplished in a straightforward manner by running an interface line between a pin on the channel computer chip to a pin connected to an incomplete channel entry circuit on the channel selection chip, such is objectionable as previously described.
Similarly, it is frequently desirable to blank portions of the display depending on the state of the channel selection chip. Although this may be accomplished by coupling an appropriate blanking signal from the channel selection chip to the display, such also involves the use of an addition chip pin. The latter problem is advantageously resolved by coupling a suitable blanking code to the data lines used to transmit the channel number information to the display. The blanking code, however, does not represent legitimate channel number information and may therefore cause erroneous tuning when supplied with the channel number information to the channel computer chip. Yet another line connected from the channel selection chip to the channel computer chip (and its associated chip pins) for controlling the operation of the latter's memory circuits can be provided to alleviate this situation.
In the preferred embodiment of the present invention the need for such additional lines and chip pins is obviated by providing means coupled to the data lines carrying the channel number information and blanking code for insuring proper tuning of the television receiver and for developing the raster blanking signal based solely on information supplied on the data lines.